Signal Processing IP

In designing communications systems, signal processing blocks are critical to the success of many of the most complex designs. Algorithms are generally developed in MATLAB or software and then passed on for implementation in hardware. That implementation step requires knowledge of the intent of the signal processing algorithm and the desired results and performance. A change as simple as a variable bit-width can potentially derail the design functionality. This type of implementation requires knowledge and experience in designing algorithms for communications systems. Eclipse designers are communications signal processing algorithm implementation experts. Our expertise includes designing blocks for FPGA, ASIC and as stand-alone “soft” IP in RTL or gate netlists, and “hard” IP with complete physical IC layouts. Examples of IP blocks developed by Eclipse and available as part of a service engagement for communications systems include:

Modulators/Demodulators

• GSM (GMSK)
• OFDM
• QAM
• FHSS
• DSSS

Forward Error Correction

• Viterbi Decoder
• Reed-Solomon Encoder/Decoder
• BCH Encoder/Decoder
• Turbo Encoder/Decoder
• Convolutional Interleaver/De-interleaver

DSP

• FFT
• FIR Filters
• IIR Filters
• Cordic
• Channelizer/Downconverter
• GMSK Correlator